The 60 GHz industrial, scientific and medical (ISM) band may have received more attention recently due to a greater potential to revolutionize short-range high-speed Wireless Personal Area Network (WPAN) systems with low power consumption. In addition, as the transistor becomes smaller in dimension, it may give lower noise figure, higher power driving capability, better speed characteristics, higher packing density and higher unity-gain frequency (fT). All these qualities may aid in higher integration, more compact and higher performance portable applications. The recent technology node supports fT greater than 120 GHz that may be more than twice the operating frequency of 60 GHz. The motivation for applications around 60 GHz frequencies may be the large bandwidth of about 7 GHz which may be unlicensed by Federal Communications Commission (FCC).
There may be many existing architectures which may be classified based on a selection of the number of intermediate stages of frequency translation between Radio Frequency (RF) signal and baseband frequency signal and also “frequency planning”, by selection of Local Oscillator (LO) and intermediate frequencies (IF).
One architecture may include a 60G Direct-conversion architecture. This architecture may be termed as either Zero-IF architecture or as Homodyne architecture with fLO=60 GHz. The frequency down conversion may be done in a single step to obtain the baseband signals. This architecture may be simple and straight-forward, making it well suited for monolithic integration. Since there may only be one mixing stage, there may not be an image band and the low noise amplifier (LNA) may not require a high image rejection ratio. However, at 60 GHz, it may be very difficult to generate LO I/Q components with less phase noise and a very stable oscillator. Since the LO may be very close to the RF frequency, there may be an issue of LO feedthrough. It may be followed by 1/f noise problem, high power consumption of frequency synthesizer to shift the frequency from VCO to 60 GHz using frequency multipliers, limited dynamic range and poor sensitivity. There may also be a risk of LO leakage to the antenna, which in turn may give rise to self-mixing of LO signal. The direct conversion using same RF and LO frequencies may lead to dynamic DC offset, which may affect the system's functionality. If the isolation may not be sufficient, the transmitter output may leak as LO of the receiver may lead to the transmission leakage self-mixing.
Another architecture may include a 30G/30G architecture. This architecture may also be termed as half RF architecture with fLO=27 GHz, it may include 3 stages of down conversion of RF to baseband signal. Initially, by double conversion using same fLO=27 GHz, obtained by frequency tripler on VCO of 9 GHz and then the third stage using a frequency divided LO of 6 GHz. Since it may be a multistage conversion, the demand on the VCO may be reduced. The first IF may have a frequency of 33 GHz which may be high and hence better image rejection, but on the contrary it may be very close to LO of 27 GHz and hence it may be difficult to separate LO interference from the IF and the LO feedthrough. The VCO may be driving two different unbalanced loads, additional circuitry and hence power consumption may be needed. To generate I/Q LO frequency for the third stage using divide by 3/2 may be difficult. Since the LO frequency and IF frequency may be an integer multiple of the RF frequency, the harmonics and sub-harmonics may lead to interference issues. The third harmonic of the LO which may mix with the 60 GHz RF, may give rise to the near IF frequency of 30 GHz. This harmonic interference may add on with the down-converted original IF and may degrade the performance of the transceiver.
Another architecture may include a 20G/40G architecture. This architecture may be simpler because it may have only 2 stages of conversion. The first stage fLO=40 GHz may be far from the fIF=20 GHz and hence no interference may effect. LO may have a considerable higher frequency and hence difficult to achieve VCO stability and frequency synthesis may have a higher power consumption. The same issue of unbalanced load for the VCO leading to additional circuitry may be prevailing here as well. The IF and LO frequency for the first stage may be integer multiples of RF signal and hence may lead to interference from harmonics and sub-harmonics.
Yet another architecture may include a 10G/50G architecture. This architecture may have the lowest IF frequency of 12 GHz and may have two stage frequency conversion. The demand on the I/Q generation may be reduced. The relatively low IF of 12-GHz may place a high demand on the image rejection on both the LNA and mixer. This architecture may need unconventional circuitry for VCO load balancing, leading to additional power consumption. The harmonics and sub-harmonics corruption may not be that high, since RF may be at a higher factor when compared to IF and LO. This architecture may provide a better rejection of nearby interferers and DC offset suppression, since the first stage LO may include a value of 48 GHz and thereby being considerably large. This may relax the Q-factor of the channel selection filter.